The semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area. As semiconductor devices are scaled down, new techniques are needed to maintain the electronic components' performance from one generation to the next. For example, low leakage current transistors are desirable for high density and high speed integrated circuits.
Fin field-effect transistors (FinFETs) have emerged as an effective alternative to further reduce leakage current in semiconductor devices. In contrast to the prior planar MOS transistor, which has a channel formed at the surface of a semiconductor substrate, a FinFET has a three dimensional channel region. In a FinFET, an active region including the drain, the channel region and the source protrudes up from the surface of the semiconductor substrate upon which the FinFET is located. The active region of the FinFET, like a fin, is rectangular in shape from a cross section view. In addition, the gate structure of the FinFET wraps the active region around three sides like an upside-down U. As a result, the gate structure's control of the channel has become stronger. The short channel leakage effect of conventional planar transistors has been reduced. As such, when the FinFET is turned off, the gate structure can better control the channel so as to reduce leakage current.
As technologies further evolve, vertical transistors are being researched recently. A vertical transistor may be formed in a vertical nanowire. More particularly, the vertical nanowire comprises a source formed over a substrate, a channel formed over the source and a drain formed over the channel. A gate dielectric and a gate electrode are formed to encircle the channel of the vertical nanowire. As a result, the vertical transistor has a gate-all-around structure since the channel is surrounded by the gate electrode. Such a gate-all-around structure helps to minimize the short-channel effects of the vertical transistor.